Design and Test of Computers: Automated Source-Level Debugging. / IEEE, IEEE Computer Society y IEEE Circuits and Systems Society

Colaborador(es): Tipo de material: Recurso continuoRecurso continuoIdioma: Inglés Detalles de publicación: Nueva Jersey​, Estados Unidos: IEEE Computer Society 2006Descripción: v. ; 27cmISSN:
  • 0740-7475
Tema(s): Clasificación CDD:
  • D457
Contenidos:
8-Automated Source-Level Error Localization in Hardware Designs. 20-MOSFET Mismatch Modeling: A New Approach. 30-Logic Design for Printability Using OPC Methods. 38-Early, Accurate Dependability Analysis of CAN-Based Networked Systems. 46-Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses. 58-Efficient Parametric Fault Detection in Switched-Capacitor Filters.
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8-Automated Source-Level Error Localization in Hardware Designs. 20-MOSFET Mismatch Modeling: A New Approach. 30-Logic Design for Printability Using OPC Methods. 38-Early, Accurate Dependability Analysis of CAN-Based Networked Systems. 46-Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses. 58-Efficient Parametric Fault Detection in Switched-Capacitor Filters.

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