Design and Test of Computers: Automated Source-Level Debugging. / IEEE, IEEE Computer Society y IEEE Circuits and Systems Society
Tipo de material:
- 0740-7475
- D457
Contenidos:
8-Automated Source-Level Error Localization in Hardware Designs. 20-MOSFET Mismatch Modeling: A New Approach. 30-Logic Design for Printability Using OPC Methods. 38-Early, Accurate Dependability Analysis of CAN-Based Networked Systems. 46-Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses. 58-Efficient Parametric Fault Detection in Switched-Capacitor Filters.
Tipo de ítem | Biblioteca actual | Colección | Signatura topográfica | Copia número | Estado | Código de barras | |
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Biblioteca Rafael Meza Ayau | Hemeroteca | D457 2006 (Navegar estantería(Abre debajo)) | 01 | Disponible | 37121 |
Navegando Biblioteca Rafael Meza Ayau estanterías, Colección: Hemeroteca Cerrar el navegador de estanterías (Oculta el navegador de estanterías)
8-Automated Source-Level Error Localization in Hardware Designs. 20-MOSFET Mismatch Modeling: A New Approach. 30-Logic Design for Printability Using OPC Methods. 38-Early, Accurate Dependability Analysis of CAN-Based Networked Systems. 46-Source-Synchronous Testing of Multilane PCI Express and HyperTransport Buses. 58-Efficient Parametric Fault Detection in Switched-Capacitor Filters.
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