Design and Test of Computers: Advances in Functional Validation through Hybrid Techniques. /
Design and Test of Computers: Advances in Functional Validation through Hybrid Techniques. /
IEEE, IEEE Computer Society y IEEE Circuits and Systems Society
- Nueva Jersey, Estados Unidos: IEEE Computer Society 2007
- v. ; 27cm.
- Bimensual
- March/April 2007, Vol. 24, No. 2
110-Guest Editors' Introduction: Attacking Functional Verification through Hybrid Techniques. 112-A Survey of Hybrid Techniques for Functional Verification. 124-Hybrid Verification of Protocol Bridges. 132-Combining Theorem Proving with Model Checking through Predicate Abstraction. 140-Hybrid, Incremental Assertion-Based Verification for TLM Design Flows. 154-Hybrid Approach to Faster Functional Verification with Full Visibility. 164-Economic Aspects of Memory Built-in Self-Repair. 174-Roundtable: Envisioning the Future for Multiprocessor SoC. 184-FSA SiP Market and Patent Analysis Report. 193-On the cusp of a validation wall
0740-7475
TECNOLOGÍA--PUBLICACIONES SERIADAS
/ D457
110-Guest Editors' Introduction: Attacking Functional Verification through Hybrid Techniques. 112-A Survey of Hybrid Techniques for Functional Verification. 124-Hybrid Verification of Protocol Bridges. 132-Combining Theorem Proving with Model Checking through Predicate Abstraction. 140-Hybrid, Incremental Assertion-Based Verification for TLM Design Flows. 154-Hybrid Approach to Faster Functional Verification with Full Visibility. 164-Economic Aspects of Memory Built-in Self-Repair. 174-Roundtable: Envisioning the Future for Multiprocessor SoC. 184-FSA SiP Market and Patent Analysis Report. 193-On the cusp of a validation wall
0740-7475
TECNOLOGÍA--PUBLICACIONES SERIADAS
/ D457
2251-8215
