Design and Test of Computers: IEEE Std 1500 and Its Usage. / IEEE, IEEE Computer Society y IEEE Circuits and Systems Society
Tipo de material:![Recurso continuo](/opac-tmpl/lib/famfamfam/SE.png)
- 0740-7475
- D457
Contenidos:
6-Guest Editors' Introduction: The Status of IEEE Std 1500. 8-IEEE Std 1500 Enables Modular SoC Testing. 18-Improved Core Isolation and Access for Hierarchical Embedded Test. 26-Turbo1500: Core-Based Design for Test and Diagnosis. 36-CTL and Its Usage in the EDA Industry. 44-The ARM Cortex-A8 Microprocessor IEEE Std 1500 Wrapper. 52-Test Access Mechanism in the Quad-Core AMD Opteron Microprocessor. 60-Algorithmic Concurrent Error Detection in Complex Digital-Processing Systems. 68-Logic Mapping in Crossbar-Based Nanoarchitectures. 78-A CMOS Resizing Methodology for Analog Circuits. 88-The Challenges of Nanotechnology and Gigacomplexity.
Tipo de ítem | Biblioteca actual | Colección | Signatura | Copia número | Estado | Fecha de vencimiento | Código de barras | |
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Biblioteca Rafael Meza Ayau | Hemeroteca | D457 2009 (Navegar estantería(Abre debajo)) | 01 | Disponible | 44523 |
6-Guest Editors' Introduction: The Status of IEEE Std 1500. 8-IEEE Std 1500 Enables Modular SoC Testing. 18-Improved Core Isolation and Access for Hierarchical Embedded Test. 26-Turbo1500: Core-Based Design for Test and Diagnosis. 36-CTL and Its Usage in the EDA Industry. 44-The ARM Cortex-A8 Microprocessor IEEE Std 1500 Wrapper. 52-Test Access Mechanism in the Quad-Core AMD Opteron Microprocessor. 60-Algorithmic Concurrent Error Detection in Complex Digital-Processing Systems. 68-Logic Mapping in Crossbar-Based Nanoarchitectures. 78-A CMOS Resizing Methodology for Analog Circuits. 88-The Challenges of Nanotechnology and Gigacomplexity.
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