Design and Test of Computers: Computer-Aided Design for Emerging Techologies. / IEEE, IEEE Computer Society y IEEE Circuits and Systems Society
Tipo de material:
Recurso continuoIdioma: Inglés Detalles de publicación: Nueva Jersey, Estados Unidos: IEEE Computer Society 2007Descripción: v. ; 27cmISSN: - 0740-7475
- D457
Contenidos:
302-Guest Editors' Introduction: The State of the Art in Nanoscale CAD. 304-An Overview of Nanoscale Devices and Circuits. 312-Tracking Uncertainty with Probabilistic Logic Circuit Testing. 322-Leakage Minimization Technique for Nanoscale CMOS VLSI. 332-Practices in Mixed-Signal and RF IC Testing. 340-Crosstalk- and SEU-Aware Networks on Chips. 352-ACID: Automatic Sort-Map Classification for Interactive Process Diagnosis. 362-Empirical Validation of Yield Recovery Using Idle-Cycle Insertion. 374-Variation-Tolerant, Power-Safe Pattern Generation. 386-Raisin: Redundancy Analysis Algorithm Simulation.
| Tipo de ítem | Biblioteca actual | Colección | Signatura topográfica | Copia número | Estado | Código de barras |
|---|---|---|---|---|---|---|
Publicación Periódica
|
Biblioteca Rafael Meza Ayau | Hemeroteca | D457 2007 (Navegar estantería(Abre debajo)) | 01 | Disponible | 40839 |
302-Guest Editors' Introduction: The State of the Art in Nanoscale CAD. 304-An Overview of Nanoscale Devices and Circuits. 312-Tracking Uncertainty with Probabilistic Logic Circuit Testing. 322-Leakage Minimization Technique for Nanoscale CMOS VLSI. 332-Practices in Mixed-Signal and RF IC Testing. 340-Crosstalk- and SEU-Aware Networks on Chips. 352-ACID: Automatic Sort-Map Classification for Interactive Process Diagnosis. 362-Empirical Validation of Yield Recovery Using Idle-Cycle Insertion. 374-Variation-Tolerant, Power-Safe Pattern Generation. 386-Raisin: Redundancy Analysis Algorithm Simulation.
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